// AUTOMATICALLY CONVERTED FROM SHADER FIXES 
//
// Generated by Microsoft (R) HLSL Shader Compiler 10.1
//
//   using 3Dmigoto v0.6.6 on Wed Jun 22 20:18:37 2022
//
//
// Buffer Definitions:
//
// cbuffer cb1
// {
//
//   float4 cb1[16];                    // Offset:    0 Size:   256
//
// }
//
// cbuffer cb0
// {
//
//   float4 cb0[32];                    // Offset:    0 Size:   512
//
// }
//
//
// Resource Bindings:
//
// Name                                 Type  Format         Dim Slot Elements
// ------------------------------ ---------- ------- ----------- ---- --------
// StereoParams                      texture  float4          2d  125        1
// cb0                               cbuffer      NA          NA    0        1
// cb1                               cbuffer      NA          NA    1        1
//
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// POSITION                 0   xyzw        0     NONE   float   xyzw
// TEXCOORD                 0   xyzw        1     NONE   float   xyzw
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_POSITION              0   xyzw        0      POS   float   xyzw
// TEXCOORD                 0   xyzw        1     NONE   float   xyzw
// TEXCOORD                 1   xyzw        2     NONE   float   xyz
// TEXCOORD                 2   xyzw        3     NONE   float   xyzw
// P                        0   x           4  RTINDEX    uint   x
//
vs_4_0
dcl_output_siv o4.x, rendertarget_array_index
dcl_constantbuffer CB1[16], immediateIndexed
dcl_constantbuffer CB0[32], immediateIndexed
dcl_resource_buffer (float,float,float,float) t125
dcl_input v0.xyzw
dcl_input v1.xyzw
dcl_output_siv o0.xyzw, position
dcl_output o1.xyzw
dcl_output o2.xyz
dcl_output o3.xyzw
dcl_temps 6
ld_indexable(buffer)(float,float,float,float) r5.xyzw, l(0, 0, 0, 0), t125.xyzw
mov o4.x, r5.z
add r0.x, cb0[6].z, l(1.000000)
mul r0.xy, r0.xxxx, v0.xyxx
mul r0.yzw, r0.yyyy, cb1[1].xxyw
mad r0.xyz, cb1[0].xywx, r0.xxxx, r0.yzwy
mad r0.xyz, cb1[2].xywx, v0.zzzz, r0.xyzx
mad r0.xyz, cb1[3].xywx, v0.wwww, r0.xyzx
ld r1.xyzw, l(0, 0, 0, 0), t125.xyzw
add r0.w, r0.z, -r1.y
mad r3.x, r1.x, r0.w, r0.x
add r0.x, cb0[7].x, l(200.000000)
mul r0.x, r0.z, r0.x
mov r3.yw, r0.yyyz
mul r3.z, r0.x, l(0.000833333354)
mad r0.x, cb0[18].w, cb0[6].x, cb0[18].z
sincos r0.x, r1.x, r0.x
add r0.yz, v1.xxyx, l(0.000000, -0.500000, -0.500000, 0.000000)
mul r0.xw, r0.xxxx, r0.zzzy
mad r2.x, r0.y, r1.x, -r0.x
mad r2.y, r0.z, r1.x, r0.w
add r0.xw, r2.xxxy, l(0.500000, 0.000000, 0.000000, 0.500000)
mad r0.xw, r0.xxxw, cb0[17].xxxy, cb0[17].zzzw
mad o1.xy, cb0[18].xyxx, cb0[6].xxxx, r0.xwxx
mov o1.zw, v1.zzzw
mul r1.xyz, v0.yyyy, cb1[13].xyzx
mad r1.xyz, cb1[12].xyzx, v0.xxxx, r1.xyzx
mad r1.xyz, cb1[14].xyzx, v0.zzzz, r1.xyzx
mad r1.xyz, cb1[15].xyzx, v0.wwww, r1.xyzx
mov o2.xyz, r1.xyzx
add r0.xw, r1.xxxy, l(-0.500000, 0.000000, 0.000000, -0.500000)
mad r1.x, cb0[31].w, cb0[6].x, cb0[31].z
sincos r1.x, r2.x, r1.x
mul r1.xy, r0.zyzz, r1.xxxx
mad r1.z, r0.y, r2.x, -r1.x
mad r1.w, r0.z, r2.x, r1.y
add r0.yz, r1.zzwz, l(0.000000, 0.500000, 0.500000, 0.000000)
mad r0.yz, r0.yyzy, cb0[30].xxyx, cb0[30].zzwz
mad o3.zw, cb0[31].xxxy, cb0[6].xxxx, r0.yyyz
mad r0.y, cb0[28].w, cb0[6].x, cb0[28].z
sincos r1.x, r2.x, r0.y
mul r0.yz, r0.wwxw, r1.xxxx
mad r0.z, r0.w, r2.x, r0.z
mad r0.x, r0.x, r2.x, -r0.y
add r0.x, r0.x, l(0.500000)
mad r0.x, r0.x, cb0[27].x, cb0[27].z
mad o3.x, cb0[28].x, cb0[6].x, r0.x
add r0.x, r0.z, l(0.500000)
mad r0.x, r0.x, cb0[27].y, cb0[27].w
mad o3.y, cb0[28].y, cb0[6].x, r0.x
add r4.x, -r5.y, r3.w
mul r4.y, r5.x, r5.w
mad r4.x, r4.x, r4.y, r3.x
ne r4.y, l(1.000000), r3.w
movc r3.x, r4.y, r4.x, r3.x
mov o0.xyzw, r3.xyzw
ret
// Approximately 49 instruction slots used
