// AUTOMATICALLY CONVERTED FROM SHADER FIXES 
//
// Generated by Microsoft (R) D3D Shader Disassembler
//
//   using 3Dmigoto v0.6.6 on Wed Jun 22 20:17:14 2022
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// POSITION                 0   xyzw        0     NONE   float   xyz
// NORMAL                   0   xyz         1     NONE   float   xyz
// TEXCOORD                 0   xyzw        2     NONE   float
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_POSITION              0   xyzw        0      POS   float   xyzw
// P                        0   x           1  RTINDEX    uint   x
//
vs_4_0
dcl_output_siv o1.x, rendertarget_array_index
dcl_constantbuffer CB0[1], immediateIndexed
dcl_constantbuffer CB1[6], immediateIndexed
dcl_constantbuffer CB2[19], immediateIndexed
dcl_constantbuffer CB3[13], immediateIndexed
dcl_input v0.xyz
dcl_input v1.xyz
dcl_output_siv o0.xyzw, position
dcl_temps 7
dcl_resource_buffer (float,float,float,float) t125
ld_indexable(buffer)(float,float,float,float) r6.xyzw, l(0, 0, 0, 0), t125.xyzw
mov o1.x, r6.z
ld_indexable(buffer)(float,float,float,float) r3.xyzw, l(0, 0, 0, 0), t125.xyzw
mul r0.x, v1.x, cb2[16].x
mul r0.y, v1.x, cb2[17].x
mul r0.z, v1.x, cb2[18].x
mul r1.x, v1.y, cb2[16].y
mul r1.y, v1.y, cb2[17].y
mul r1.z, v1.y, cb2[18].y
add r0.xyz, r0.xyzx, r1.xyzx
mul r1.x, v1.z, cb2[16].z
mul r1.y, v1.z, cb2[17].z
mul r1.z, v1.z, cb2[18].z
add r0.xyz, r0.xyzx, r1.xyzx
dp3 r0.w, r0.xyzx, r0.xyzx
rsq r0.w, r0.w
mul r0.xyz, r0.wwww, r0.xyzx
mul r1.xyz, v0.yyyy, cb2[13].xyzx
mad r1.xyz, cb2[12].xyzx, v0.xxxx, r1.xyzx
mad r1.xyz, cb2[14].xyzx, v0.zzzz, r1.xyzx
add r1.xyz, r1.xyzx, cb2[15].xyzx
mad r2.xyz, -r1.xyzx, cb0[0].wwww, cb0[0].xyzx
dp3 r0.w, r2.xyzx, r2.xyzx
rsq r0.w, r0.w
mul r2.xyz, r0.wwww, r2.xyzx
dp3 r0.w, r0.xyzx, r2.xyzx
mad r0.w, -r0.w, r0.w, l(1.000000)
sqrt r0.w, r0.w
mul r0.w, r0.w, cb1[5].z
mad r0.xyz, -r0.xyzx, r0.wwww, r1.xyzx
mul r1.xyzw, r0.yyyy, cb3[10].xyzw
mad r1.xyzw, cb3[9].xyzw, r0.xxxx, r1.xyzw
mad r0.xyzw, cb3[11].xyzw, r0.zzzz, r1.xyzw
add r0.xyzw, r0.xyzw, cb3[12].xyzw
mul r1.xyzw, v0.yyyy, cb2[1].xyzw
mad r1.xyzw, cb2[0].xyzw, v0.xxxx, r1.xyzw
mad r1.xyzw, cb2[2].xyzw, v0.zzzz, r1.xyzw
add r1.xyzw, r1.xyzw, cb2[3].xyzw
ne r2.x, cb1[5].z, l(0.000000)
movc r0.xyzw, r2.xxxx, r0.xyzw, r1.xyzw
mov r4.xyw, r0.xyxw
ne r3.w, r0.w, l(1.000000)
if_nz r3.w
  add r3.w, r0.w, -r3.y
  mad r0.x, r3.w, r3.x, r0.x
endif
div_sat r1.x, cb1[5].x, r0.w
add r0.z, r0.z, r1.x
max r0.x, r0.z, l(0.000000)
add r0.x, -r0.z, r0.x
mad r4.z, cb1[5].y, r0.x, r0.z
add r5.x, -r6.y, r4.w
mul r5.y, r6.x, r6.w
mad r5.x, r5.x, r5.y, r4.x
ne r5.y, l(1.000000), r4.w
movc r4.x, r5.y, r5.x, r4.x
mov o0.xyzw, r4.xyzw
ret
// Approximately 0 instruction slots used
