// AUTOMATICALLY CONVERTED FROM SHADER FIXES 
//
// Generated by Microsoft (R) D3D Shader Disassembler
//
//   using 3Dmigoto v0.6.6 on Wed Jun 22 20:18:18 2022
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_POSITION              0   xyzw        0      POS   float
// TEXCOORD                 0   xyzw        1     NONE   float   xy
// TEXCOORD                 1   xyzw        2     NONE   float   xyzw
// TEXCOORD                 2   xyzw        3     NONE   float   xy
// TEXCOORD                 3   xyzw        4     NONE   float   xyzw
// TEXCOORD                 4   xyzw        5     NONE   float   xyzw
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Target                0   xyzw        0   TARGET   float   xyzw
//
ps_4_0
dcl_constantbuffer CB0[35], immediateIndexed
dcl_constantbuffer CB1[9], immediateIndexed
dcl_sampler s0, mode_default
dcl_sampler s1, mode_default
dcl_sampler s2, mode_default
dcl_sampler s3, mode_default
dcl_resource_texture2d (float,float,float,float) t0
dcl_resource_texture2d (float,float,float,float) t1
dcl_resource_texture2d (float,float,float,float) t2
dcl_resource_texture2d (float,float,float,float) t3
dcl_input_ps linear v1.xy
dcl_input_ps linear v2.xyzw
dcl_input_ps linear v3.xy
dcl_input_ps linear v4.xyzw
dcl_input_ps linear v5.xyzw
dcl_output o0.xyzw
dcl_temps 4
dcl_constantbuffer CB10[4], immediateIndexed
dcl_resource_buffer (float,float,float,float) t125
ld_indexable(buffer)(float,float,float,float) r2.xyzw, l(0, 0, 0, 0), t125.xyzw
mul r2.w, -r2.x, r2.y
mad r3.xyz, -r2.wwww, cb10[0].xyzw, cb1[4].xyzw
sample r0.xyzw, v3.xyxx, t1.xyzw, s3
mad r0.xy, r0.zwzz, l(2.000000, 2.000000, 0.000000, 0.000000), l(-1.000000, -1.000000, 0.000000, 0.000000)
mad r0.xy, r0.xyxx, cb0[34].xyxx, v2.xyxx
add r0.zw, -cb0[26].zzzw, r3.xxxy
mad r0.xy, r0.zwzz, cb0[26].xxxx, r0.xyxx
sample r0.xyzw, r0.xyxx, t2.xyzw, s1
mul r0.xyz, r0.xyzx, cb0[33].xyzx
sample r1.xyzw, v2.zwzz, t3.xyzw, s2
mul r0.xyz, r0.xyzx, r1.wwww
mul r0.xyz, r0.xyzx, cb0[33].wwww
mov_sat r1.xy, v1.yxyy
add r1.xy, r1.xyxx, -cb0[22].yxyy
div_sat r1.xy, r1.xyxx, cb0[22].wzww
mul r1.zw, r1.xxxy, cb0[8].yyyy
add r0.w, -cb0[8].y, l(1.000000)
mad r1.xy, r1.yxyy, r0.wwww, r1.zwzz
mad r1.xy, r1.xyxx, cb0[21].zwzz, cb0[21].xyxx
sample r1.xyzw, r1.xyxx, t0.xyzw, s0
dp4_sat r0.w, r1.xyzw, cb0[9].xyzw
mad r1.xyzw, r0.wwww, cb0[10].xyzw, r1.xyzw
div r1.xyz, r1.xyzx, r1.wwww
mul r1.xyzw, r1.xyzw, cb0[23].xyzw
add r1.xyzw, r1.xyzw, r1.xyzw
mad r0.xyz, r0.xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), r1.xyzx
mov o0.w, r1.w
add r1.xyz, -r0.xyzx, v5.xyzx
mad r0.xyz, v5.wwww, r1.xyzx, r0.xyzx
add r1.xyz, -r0.xyzx, v4.xyzx
mad o0.xyz, v4.wwww, r1.xyzx, r0.xyzx
ret
// Approximately 0 instruction slots used
