// AUTOMATICALLY CONVERTED FROM SHADER FIXES 
//
// Generated by Microsoft (R) D3D Shader Disassembler
//
//   using 3Dmigoto v0.6.6 on Wed Jun 22 20:18:12 2022
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// POSITION                 0   xyzw        0     NONE   float   xyzw
// TEXCOORD                 0   xy          1     NONE   float   xy
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Position              0   xyzw        0      POS   float   xyzw
// TEXCOORD                 0   xyzw        1     NONE   float   xyzw
// TEXCOORD                 1   xy          2     NONE   float   xy
// TEXCOORD                 2     zw        2     NONE   float     zw
// P                        0   x           3  RTINDEX    uint   x
//
vs_4_0
dcl_output_siv o3.x, rendertarget_array_index
dcl_constantbuffer CB0[4], immediateIndexed
dcl_input v0.xyzw
dcl_input v1.xy
dcl_output_siv o0.xyzw, position
dcl_output o1.xyzw
dcl_output o2.xy
dcl_output o2.zw
dcl_temps 5
dcl_resource_buffer (float,float,float,float) t125
ld_indexable(buffer)(float,float,float,float) r4.xyzw, l(0, 0, 0, 0), t125.xyzw
mov o3.x, r4.z
ld_indexable(buffer)(float,float,float,float) r1.xyzw, l(0, 0, 0, 0), t125.xyzw
mul r0.xyzw, v0.yyyy, cb0[1].xyzw
mad r0.xyzw, cb0[0].xyzw, v0.xxxx, r0.xyzw
mad r0.xyzw, cb0[2].xyzw, v0.zzzz, r0.xyzw
mad r0.xyzw, cb0[3].xyzw, v0.wwww, r0.xyzw
mov r2.xyzw, r0.xyzw
ne r1.w, r0.w, l(1.000000)
if_nz r1.w
  add r1.w, r0.w, -r1.y
  mad r0.x, r1.w, r1.x, r0.x
endif
mad r0.xy, r0.xyxx, l(1.000000, -1.000000, 0.000000, 0.000000), r0.wwww
mov o1.zw, r0.zzzw
mul o1.xy, r0.xyxx, l(0.500000, 0.500000, 0.000000, 0.000000)
mov o2.xyzw, v1.xyxy
add r3.x, -r4.y, r2.w
mul r3.y, r4.x, r4.w
mad r3.x, r3.x, r3.y, r2.x
ne r3.y, l(1.000000), r2.w
movc r2.x, r3.y, r3.x, r2.x
mov o0.xyzw, r2.xyzw
ret
// Approximately 0 instruction slots used
