// AUTOMATICALLY CONVERTED FROM SHADER FIXES 
//
// Generated by Microsoft (R) D3D Shader Disassembler
//
//   using 3Dmigoto v0.6.181 on Sat Aug 23 17:56:42 2025
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// POSITION                 0   xyz         0     NONE   float   xyz
// NORMAL                   0   xyz         1     NONE   float   xyz
// BINORMAL                 0   xyz         2     NONE   float   xyz
// TANGENT                  0   xyz         3     NONE   float   xyz
// TEXCOORD                 0   xy          4     NONE   float   xy
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Position              0   xyzw        0      POS   float   xyzw
// TEXCOORD                 0   xyzw        1     NONE   float   xyzw
// TEXCOORD                 1   xyzw        2     NONE   float   xyzw
// TEXCOORD                 2   xyz         3     NONE   float   xyz
// TEXCOORD                 4      w        3     NONE   float      w
// TEXCOORD                 3   xyz         4     NONE   float   xyz
// P                        0   x           5  RTINDEX    uint   x
//
vs_5_0
dcl_output_siv o5.x, rendertarget_array_index
dcl_globalFlags refactoringAllowed
dcl_constantbuffer CB0[9], immediateIndexed
dcl_input v0.xyz
dcl_input v1.xyz
dcl_input v2.xyz
dcl_input v3.xyz
dcl_input v4.xy
dcl_output_siv o0.xyzw, position
dcl_output o1.xyzw
dcl_output o2.xyzw
dcl_output o3.xyz
dcl_output o3.w
dcl_output o4.xyz
dcl_temps 34
dcl_resource_buffer (float,float,float,float) t125
ld_indexable(buffer)(float,float,float,float) r33.xyzw, l(0, 0, 0, 0), t125.xyzw
mov o5.x, r33.z
ld_indexable(buffer)(float,float,float,float) r25.xyzw, l(0, 0, 0, 0), t125.xyzw
mul r0.xyzw, v0.yyyy, cb0[1].xyzw
mad r0.xyzw, cb0[0].xyzw, v0.xxxx, r0.xyzw
mad r0.xyzw, cb0[2].xyzw, v0.zzzz, r0.xyzw
mad r0.x, r25.x, r25.y, r0.x
add r31.xyzw, r0.xyzw, cb0[3].xyzw
add r0.xy, v4.xyxx, l(0.500000, 0.500000, 0.000000, 0.000000)
mad o1.xyzw, r0.xyxy, cb0[8].xxyy, cb0[6].xyzw
mad o2.xy, r0.xyxx, cb0[8].zzzz, cb0[7].xyxx
mov o2.z, v0.z
mov o2.w, l(0)
mul r0.xyz, v2.xyzx, cb0[5].yyyy
mad r0.xyz, cb0[5].xxxx, v3.xyzx, r0.xyzx
mad o3.xyz, cb0[5].zzzz, v1.xyzx, r0.xyzx
max r0.x, v0.z, l(0.000000)
mul r0.x, r0.x, r0.x
min o3.w, r0.x, l(1.000000)
add r0.xyz, v0.xyzx, cb0[4].xyzx
add r0.xyz, -r0.xyzx, cb0[4].xyzx
dp3 o4.x, -v3.xyzx, r0.xyzx
dp3 o4.y, -v2.xyzx, r0.xyzx
dp3 o4.z, -v1.xyzx, r0.xyzx
add r32.x, -r33.y, r31.w
mul r32.y, r33.x, r33.w
mad r32.x, r32.x, r32.y, r31.x
ne r32.y, l(1.000000), r31.w
movc r31.x, r32.y, r32.x, r31.x
mov o0.xyzw, r31.xyzw
ret
// Approximately 0 instruction slots used
