// AUTOMATICALLY CONVERTED FROM SHADER FIXES 
//
// Generated by Microsoft (R) D3D Shader Disassembler
//
//   using 3Dmigoto v0.6.198 on Wed May 28 00:41:38 2025
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Input
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Output
cs_5_0
dcl_globalFlags refactoringAllowed
dcl_constantbuffer CB0[2], immediateIndexed
dcl_resource_texture2d (float,float,float,float) t0
dcl_resource_texture2d (float,float,float,float) t1
dcl_resource_texture2d (float,float,float,float) t2
dcl_resource_texture2d (float,float,float,float) t3
dcl_resource_texture2d (float,float,float,float) t4
dcl_uav_typed_texture2darray (float,float,float,float) u0
dcl_input vThreadGroupID.xy
dcl_input vThreadIDInGroup.xy
dcl_input vThreadID.xy
dcl_temps 40
dcl_constantbuffer CB12[2], immediateIndexed
dcl_resource_texture1d (float,float,float,float) t120
dcl_tgsm_structured g0, 16, 64
dcl_tgsm_structured g1, 4, 64
dcl_thread_group 8, 8, 1
mov r40.z, l(0)
ld_indexable(texture1d)(float,float,float,float) r20.xyzw, l(4, 0, 0, 0), t120.xyzw
ishl r0.xy, vThreadGroupID.xyxx, l(2, 2, 0, 0)
iadd r0.zw, r0.xxxy, vThreadIDInGroup.xxxy
iadd r0.xy, l(2, 2, 0, 0), -r0.xyxx
iadd r0.zw, r0.zzzw, l(0, 0, -2, -2)
imax r0.zw, r0.zzzw, l(0, 0, 0, 0)
imin r1.xy, r0.zwzz, cb0[0].xyxx
mov r1.zw, l(0,0,0,0)
ld_indexable(texture2d)(float,float,float,float) r2.xyz, r1.xyww, t4.xyzw
ld_indexable(texture2d)(float,float,float,float) r3.xyzw, r1.xyww, t2.xyzw
ld_indexable(texture2d)(float,float,float,float) r0.z, r1.xyzw, t3.yzxw
add r1.xyz, -r2.xyzx, r3.xyzx
mad r2.xy, r1.xzxx, l(2.000000, 2.000000, 0.000000, 0.000000), r3.xzxx
min r0.w, r2.y, r2.x
min r0.w, r2.y, r0.w
mov_sat r0.w, -r0.w
mad r2.x, -r3.w, l(2.000000), l(1.000000)
mad_sat r1.w, r0.w, l(4.000000), r2.x
mov r2.xz, l(0,0,0,0)
dp3 r0.w, r1.xyzx, l(0.300000, 0.590000, 0.110000, 0.000000)
lt r0.w, l(0.010000), r0.w
and r2.y, r0.w, l(0x3f000000)
if_nz r20.y
  movc r2.xyz, cb0[0].wwww, l(0), l(0)
else
  movc r2.xyz, cb0[0].wwww, r2.xyzx, r1.xywx
endif
mov r1.xy, r2.xyxx
mul r0.w, r2.z, r2.z
add r2.xyz, -r1.xyzx, r3.xyzx
mov r1.w, l(1.000000)
mov r2.w, l(-1.000000)
mad r1.xyzw, r0.wwww, r2.xyzw, r1.xyzw
mul r2.xyz, r1.xyzx, l(0.330000, 0.330000, 0.330000, 0.000000)
mov r2.w, l(1.000000)
movc r1.xyzw, cb0[0].zzzz, r2.xyzw, r1.xyzw
imad r0.w, vThreadIDInGroup.y, l(8), vThreadIDInGroup.x
store_structured g0.xyzw, r0.w, l(0), r1.xyzw
store_structured g1.x, r0.w, l(0), r0.z
sync_g_t
iadd r0.zw, vThreadID.xxxy, l(0, 0, -1, -1)
ishr r0.zw, r0.zzzw, l(0, 0, 1, 1)
iadd r0.xy, r0.zwzz, r0.xyxx
ishl r0.y, r0.y, l(3)
iadd r0.x, r0.x, r0.y
iadd r1.xyzw, r0.xxxx, l(2, 7, 10, 16)
ld_structured r2.xyzw, r1.x, l(0), g0.xyzw
iadd r3.xyzw, r0.xxxx, l(1, 8, 9, -1)
ld_structured r4.xyzw, r3.w, l(0), g0.xyzw
ld_structured r5.xyzw, r3.z, l(0), g0.xyzw
ld_structured r6.xyzw, r3.y, l(0), g0.xyzw
ld_structured r7.xyzw, r0.x, l(0), g0.xyzw
ld_structured r0.y, r0.x, l(0), g1.xxxx
iadd r0.xzw, r0.xxxx, l(17, 0, -8, -7)
mov r8.xy, vThreadID.xyxx
mov r8.zw, l(0,0,0,0)
ld_indexable(texture2d)(float,float,float,float) r8.z, r8.xyzw, t1.yzxw
ld_indexable(texture2d)(float,float,float,float) r9.xyzw, r8.xyww, t0.xyzw
lt r8.x, r8.z, cb0[1].y
lt r8.y, cb0[1].x, r8.z
or r8.x, r8.y, r8.x
max r8.y, r8.z, l(0.001000)
div r8.y, l(25.000000), r8.y
mul r8.z, r8.y, r8.z
movc r8.x, r8.x, -r8.y, r8.z
mad r0.y, -r0.y, r8.y, r8.x
add r0.y, -|r0.y|, l(1.000000)
max r0.y, r0.y, l(0.000000)
and r10.xyzw, vThreadID.xyxy, l(1, 1, 1, 1)
movc r10.xyzw, r10.xyzw, l(0.750000,0.750000,0.250000,0.250000), l(0.250000,0.250000,0.750000,0.750000)
mul r10.xyzw, r10.yyww, r10.xzxz
mul r11.xyzw, r10.xyzw, l(0.001000, 0.001000, 0.001000, 0.001000)
mad r0.y, r10.x, r0.y, r11.x
ld_structured r12.xyzw, r3.x, l(0), g0.xyzw
ld_structured r3.x, r3.x, l(0), g1.xxxx
mad r3.x, -r3.x, r8.y, r8.x
add r3.x, -|r3.x|, l(1.000000)
max r3.x, r3.x, l(0.000000)
mad r3.x, r10.y, r3.x, r11.y
mul r12.xyzw, r3.xxxx, r12.xyzw
add r3.x, r0.y, r3.x
mad r7.xyzw, r7.xyzw, r0.yyyy, r12.xyzw
ld_structured r0.y, r3.y, l(0), g1.xxxx
mad r0.y, -r0.y, r8.y, r8.x
add r0.y, -|r0.y|, l(1.000000)
max r0.y, r0.y, l(0.000000)
mad r0.y, r10.z, r0.y, r11.z
mad r6.xyzw, r6.xyzw, r0.yyyy, r7.xyzw
add r0.y, r0.y, r3.x
ld_structured r3.x, r3.z, l(0), g1.xxxx
ld_structured r3.y, r3.w, l(0), g1.xxxx
mad r3.y, -r3.y, r8.y, r8.x
add r3.y, -|r3.y|, l(1.000000)
mad r3.x, -r3.x, r8.y, r8.x
add r3.x, -|r3.x|, l(1.000000)
max r3.xy, r3.xyxx, l(0.000000, 0.000000, 0.000000, 0.000000)
mad r3.x, r10.w, r3.x, r11.w
mad r5.xyzw, r5.xyzw, r3.xxxx, r6.xyzw
add r0.y, r0.y, r3.x
mad r0.y, r3.y, l(0.025000), r0.y
mul r3.x, r3.y, l(0.025000)
mad r3.xyzw, r4.xyzw, r3.xxxx, r5.xyzw
ld_structured r1.x, r1.x, l(0), g1.xxxx
mad r1.x, -r1.x, r8.y, r8.x
add r1.x, -|r1.x|, l(1.000000)
max r1.x, r1.x, l(0.000000)
mul r4.x, r1.x, l(0.025000)
mad r0.y, r1.x, l(0.025000), r0.y
mad r2.xyzw, r2.xyzw, r4.xxxx, r3.xyzw
ld_structured r3.xyzw, r1.y, l(0), g0.xyzw
ld_structured r1.x, r1.y, l(0), g1.xxxx
mad r1.x, -r1.x, r8.y, r8.x
add r1.x, -|r1.x|, l(1.000000)
max r1.x, r1.x, l(0.000000)
mul r1.y, r1.x, l(0.025000)
mad r0.y, r1.x, l(0.025000), r0.y
mad r2.xyzw, r3.xyzw, r1.yyyy, r2.xyzw
ld_structured r3.xyzw, r1.z, l(0), g0.xyzw
ld_structured r1.x, r1.z, l(0), g1.xxxx
mad r1.x, -r1.x, r8.y, r8.x
add r1.x, -|r1.x|, l(1.000000)
max r1.x, r1.x, l(0.000000)
mul r1.y, r1.x, l(0.025000)
mad r0.y, r1.x, l(0.025000), r0.y
mad r2.xyzw, r3.xyzw, r1.yyyy, r2.xyzw
ld_structured r3.xyzw, r1.w, l(0), g0.xyzw
ld_structured r1.x, r1.w, l(0), g1.xxxx
mad r1.x, -r1.x, r8.y, r8.x
add r1.x, -|r1.x|, l(1.000000)
max r1.x, r1.x, l(0.000000)
mul r1.y, r1.x, l(0.025000)
mad r0.y, r1.x, l(0.025000), r0.y
mad r1.xyzw, r3.xyzw, r1.yyyy, r2.xyzw
ld_structured r2.xyzw, r0.x, l(0), g0.xyzw
ld_structured r0.x, r0.x, l(0), g1.xxxx
mad r0.x, -r0.x, r8.y, r8.x
add r0.x, -|r0.x|, l(1.000000)
max r0.x, r0.x, l(0.000000)
mul r3.x, r0.x, l(0.025000)
mad r0.x, r0.x, l(0.025000), r0.y
mad r1.xyzw, r2.xyzw, r3.xxxx, r1.xyzw
ld_structured r2.xyzw, r0.z, l(0), g0.xyzw
ld_structured r3.xyzw, r0.w, l(0), g0.xyzw
ld_structured r0.y, r0.z, l(0), g1.xxxx
ld_structured r0.z, r0.w, l(0), g1.xxxx
mad r0.z, -r0.z, r8.y, r8.x
mad r0.y, -r0.y, r8.y, r8.x
add r0.yz, -|r0.yyzy|, l(0.000000, 1.000000, 1.000000, 0.000000)
max r0.yz, r0.yyzy, l(0.000000, 0.000000, 0.000000, 0.000000)
mul r0.w, r0.y, l(0.025000)
mad r0.x, r0.y, l(0.025000), r0.x
mad r0.x, r0.z, l(0.025000), r0.x
mul r0.y, r0.z, l(0.025000)
div r0.x, l(1.000000, 1.000000, 1.000000, 1.000000), r0.x
mad r1.xyzw, r2.xyzw, r0.wwww, r1.xyzw
mad r1.xyzw, r3.xyzw, r0.yyyy, r1.xyzw
mul r0.xyzw, r0.xxxx, r1.xyzw
mov r1.xyz, r0.xyzx
mov r1.w, l(0)
mad r0.xyzw, r9.xyzw, r0.wwww, r1.xyzw
mov r40.xy, vThreadID.xyyy
store_uav_typed u0.xyzw, r40.xyzz, r0.xyzw
ret
// Approximately 0 instruction slots used
