// AUTOMATICALLY CONVERTED FROM SHADER FIXES 
//
// Generated by Microsoft (R) D3D Shader Disassembler
//
//   using 3Dmigoto v0.6.181 on Thu Dec 28 15:24:34 2023
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// POSITION                 0   xyzw        0     NONE   float   xyzw
// BLENDINDICES             0   xyzw        1     NONE   float   x
// NORMAL                   0   xyz         2     NONE   float   xyz
// TANGENT                  0   xyzw        3     NONE   float   xyzw
// TEXCOORD                 0   xy          4     NONE   float   xy
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Position              0   xyzw        0      POS   float   xyzw
// TEXCOORD                 0   xy          1     NONE   float   xy
// TEXCOORD                 5     zw        1     NONE   float     zw
// TEXCOORD                 1   xyzw        2     NONE   float   xyzw
// TEXCOORD                 2   xyz         3     NONE   float   xyz
// TEXCOORD                 3   xyz         4     NONE   float   xyz
// TEXCOORD                 4   xyzw        5     NONE   float   xyzw
// P                        0   x           6  RTINDEX    uint   x
//
vs_5_0
dcl_output_siv o6.x, rendertarget_array_index
dcl_globalFlags refactoringAllowed
dcl_constantbuffer CB0[3], immediateIndexed
dcl_constantbuffer CB2[7], immediateIndexed
dcl_constantbuffer CB4[1536], dynamicIndexed
dcl_constantbuffer CB12[3], immediateIndexed
dcl_input v0.xyzw
dcl_input v1.x
dcl_input v2.xyz
dcl_input v3.xyzw
dcl_input v4.xy
dcl_output_siv o0.xyzw, position
dcl_output o1.xy
dcl_output o1.zw
dcl_output o2.xyzw
dcl_output o3.xyz
dcl_output o4.xyz
dcl_output o5.xyzw
dcl_temps 29
dcl_resource_buffer (float,float,float,float) t125
ld_indexable(buffer)(float,float,float,float) r29.xyzw, l(0, 0, 0, 0), t125.xyzw
mov o6.x, r29.z
ld_indexable(buffer)(float,float,float,float) r25.xyzw, l(0, 0, 0, 0), t125.xyzw
mul r0.x, v1.x, l(765.299988)
ftoi r0.x, r0.x
bfi r0.y, l(31), l(1), r0.x, l(1)
ishl r0.x, r0.x, l(1)
dp4 r1.y, v0.xyzw, cb4[r0.y + 0].xyzw
dp4 r1.x, v0.xyzw, cb4[r0.x + 0].xyzw
mov r1.w, l(1.000000)
iadd r2.xyzw, r0.xxxx, l(2, 3, 4, 5)
dp4 r1.z, v0.xyzw, cb4[r2.x + 0].xyzw
dp4 r3.x, r1.xyzw, cb2[0].xyzw
dp4 r3.y, r1.xyzw, cb2[1].xyzw
dp4 r3.w, r1.xyzw, cb2[3].xyzw
dp4 r20.z, r1.xyzw, cb2[2].xyzw
mov r20.xyw, r3.xyxw
add r26.x, r20.w, -r25.y
mad r20.x, r25.x, r26.x, r20.x
mov o0.xyzw, r20.xyzw
div r0.zw, r3.xxxy, r3.wwww
dp4 r1.x, v0.xyzw, cb4[r2.y + 0].xyzw
dp4 r1.y, v0.xyzw, cb4[r2.z + 0].xyzw
dp4 r1.z, v0.xyzw, cb4[r2.w + 0].xyzw
mov r1.w, l(1.000000)
dp4 r2.z, r1.xyzw, cb2[0].xyzw
dp4 r2.w, r1.xyzw, cb2[1].xyzw
dp4 r1.x, r1.xyzw, cb2[3].xyzw
div r1.xy, r2.zwzz, r1.xxxx
add r0.zw, r0.zzzw, -r1.xxxy
mul o1.zw, r0.zzzw, l(0.000000, 0.000000, 0.500000, -0.500000)
mul o1.xy, v4.xyxx, cb0[2].wwww
dp3 r1.x, v2.xyzx, cb4[r0.x + 0].xyzx
dp3 r3.x, v3.xyzx, cb4[r0.x + 0].xyzx
dp3 r1.y, v2.xyzx, cb4[r0.y + 0].xyzx
dp3 r3.y, v3.xyzx, cb4[r0.y + 0].xyzx
dp3 r1.z, v2.xyzx, cb4[r2.x + 0].xyzx
dp3 r3.z, v3.xyzx, cb4[r2.x + 0].xyzx
dp3 r0.x, r1.xyzx, cb2[4].xyzx
dp3 r0.y, r1.xyzx, cb2[5].xyzx
dp3 r0.z, r1.xyzx, cb2[6].xyzx
dp3 r0.w, r0.xyzx, r0.xyzx
rsq r0.w, r0.w
mul r0.xyz, r0.wwww, r0.xyzx
dp3 r1.x, r3.xyzx, cb2[4].xyzx
dp3 r1.y, r3.xyzx, cb2[5].xyzx
dp3 r1.z, r3.xyzx, cb2[6].xyzx
dp3 r0.w, r1.xyzx, r1.xyzx
rsq r0.w, r0.w
mul r1.xyz, r0.wwww, r1.xyzx
mul r2.xyz, r0.zxyz, r1.yzxy
mad r2.xyz, r0.yzxy, r1.zxyz, -r2.xyzx
mov o4.xyz, r0.xyzx
mov o3.xyz, r1.xyzx
mul o2.xyz, r2.xyzx, v3.wwww
frc r0.xy, cb0[0].xyxx
add r0.xy, -r0.xyxx, cb0[0].xyxx
mad o2.w, -r0.y, l(0.00392156886), l(1.000000)
mad r0.xy, -r0.xxxx, l(0.00392156886, 0.00392156886, 0.000000, 0.000000), l(1.000000, 1.100000, 0.000000, 0.000000)
max r0.y, r0.y, l(1.000000)
add r0.y, -r0.x, r0.y
div r0.y, l(1.000000, 1.000000, 1.000000, 1.000000), r0.y
mul o5.w, r0.y, -r0.x
mov o5.z, r0.y
mul o5.xy, v4.xyxx, cb0[1].wwww
ret
// Approximately 0 instruction slots used
