// AUTOMATICALLY CONVERTED FROM SHADER FIXES 
//
// Generated by Microsoft (R) D3D Shader Disassembler
//
//   using 3Dmigoto v0.6.181 on Sat Dec 30 01:00:10 2023
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// POSITION                 0   xyzw        0     NONE   float   xyzw
// NORMAL                   0   xyz         1     NONE   float   xyz
// TEXCOORD                 0   xy          2     NONE   float   xy
// TEXCOORD                 4   xyzw        3     NONE   float   xyzw
// TEXCOORD                 5   xyzw        4     NONE   float   xyzw
// TEXCOORD                 6   xyzw        5     NONE   float   xyzw
// TEXCOORD                 7   xyzw        6     NONE   float
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Position              0   xyzw        0      POS   float   xyzw
// TEXCOORD                 0   xy          1     NONE   float   xy
// TEXCOORD                 2     zw        1     NONE   float     zw
// TEXCOORD                 1   xyz         2     NONE   float   xyz
// P                        0   x           3  RTINDEX    uint   x
//
vs_5_0
dcl_output_siv o3.x, rendertarget_array_index
dcl_globalFlags refactoringAllowed
dcl_constantbuffer CB0[1], immediateIndexed
dcl_constantbuffer CB2[7], immediateIndexed
dcl_constantbuffer CB12[3], immediateIndexed
dcl_input v0.xyzw
dcl_input v1.xyz
dcl_input v2.xy
dcl_input v3.xyzw
dcl_input v4.xyzw
dcl_input v5.xyzw
dcl_output_siv o0.xyzw, position
dcl_output o1.xy
dcl_output o1.zw
dcl_output o2.xyz
dcl_temps 29
dcl_resource_buffer (float,float,float,float) t125
ld_indexable(buffer)(float,float,float,float) r29.xyzw, l(0, 0, 0, 0), t125.xyzw
mov o3.x, r29.z
ld_indexable(buffer)(float,float,float,float) r25.xyzw, l(0, 0, 0, 0), t125.xyzw
dp4 r0.x, v0.xyzw, v3.xyzw
dp4 r0.y, v0.xyzw, v4.xyzw
dp4 r0.z, v0.xyzw, v5.xyzw
mov r0.w, l(1.000000)
dp4 r20.x, r0.xyzw, cb2[0].xyzw
dp4 r20.y, r0.xyzw, cb2[1].xyzw
dp4 r20.z, r0.xyzw, cb2[2].xyzw
dp4 r20.w, r0.xyzw, cb2[3].xyzw
add r26.x, r20.w, -r25.y
mad r20.x, r25.x, r26.x, r20.x
mov o0.xyzw, r20.xyzw
mul o1.xy, v2.xyxx, cb0[0].wwww
mov o1.zw, l(0,0,0,0)
dp3 r0.x, v1.xyzx, v3.xyzx
dp3 r0.y, v1.xyzx, v4.xyzx
dp3 r0.z, v1.xyzx, v5.xyzx
dp3 r1.x, r0.xyzx, cb2[4].xyzx
dp3 r1.y, r0.xyzx, cb2[5].xyzx
dp3 r1.z, r0.xyzx, cb2[6].xyzx
dp3 r0.x, r1.xyzx, r1.xyzx
rsq r0.x, r0.x
mul o2.xyz, r0.xxxx, r1.xyzx
ret
// Approximately 0 instruction slots used
