// AUTOMATICALLY CONVERTED FROM SHADER FIXES 
//
// Generated by Microsoft (R) D3D Shader Disassembler
//
//   using 3Dmigoto v0.6.181 on Wed Dec 27 20:12:56 2023
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// POSITION                 0   xyzw        0     NONE   float   xyzw
// BLENDWEIGHT              0   xyzw        1     NONE   float   xyzw
// BLENDINDICES             0   xyzw        2     NONE   float   xyzw
// NORMAL                   0   xyz         3     NONE   float   xyz
// TANGENT                  0   xyzw        4     NONE   float   xyzw
// TEXCOORD                 0   xy          5     NONE   float   xy
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Position              0   xyzw        0      POS   float   xyzw
// TEXCOORD                 0   xy          1     NONE   float   xy
// TEXCOORD                 1   xyzw        2     NONE   float   xyzw
// TEXCOORD                 2   xyzw        3     NONE   float   xyzw
// TEXCOORD                 3   xyz         4     NONE   float   xyz
// TEXCOORD                 4   xyz         5     NONE   float   xyz
// TEXCOORD                 5   xyzw        6     NONE   float   xyzw
// TEXCOORD                 6   xyzw        7     NONE   float   xyzw
// P                        0   x           8  RTINDEX    uint   x
//
vs_5_0
dcl_output_siv o8.x, rendertarget_array_index
dcl_globalFlags refactoringAllowed
dcl_constantbuffer CB0[3], immediateIndexed
dcl_constantbuffer CB2[7], immediateIndexed
dcl_constantbuffer CB4[1536], dynamicIndexed
dcl_constantbuffer CB12[3], immediateIndexed
dcl_input v0.xyzw
dcl_input v1.xyzw
dcl_input v2.xyzw
dcl_input v3.xyz
dcl_input v4.xyzw
dcl_input v5.xy
dcl_output_siv o0.xyzw, position
dcl_output o1.xy
dcl_output o2.xyzw
dcl_output o3.xyzw
dcl_output o4.xyz
dcl_output o5.xyz
dcl_output o6.xyzw
dcl_output o7.xyzw
dcl_temps 29
dcl_resource_buffer (float,float,float,float) t125
ld_indexable(buffer)(float,float,float,float) r29.xyzw, l(0, 0, 0, 0), t125.xyzw
mov o8.x, r29.z
ld_indexable(buffer)(float,float,float,float) r25.xyzw, l(0, 0, 0, 0), t125.xyzw
mul r0.xyzw, v2.xyzw, l(765.299988, 765.299988, 765.299988, 765.299988)
ftoi r0.xyzw, r0.xyzw
bfi r1.xyzw, l(31, 31, 31, 31), l(1, 1, 1, 1), r0.xyzw, l(1, 1, 1, 1)
ishl r0.xyzw, r0.xyzw, l(1, 1, 1, 1)
mul r2.xyzw, v1.yyyy, cb4[r1.y + 0].xyzw
mad r2.xyzw, cb4[r1.x + 0].xyzw, v1.xxxx, r2.xyzw
mad r2.xyzw, cb4[r1.z + 0].xyzw, v1.zzzz, r2.xyzw
mad r1.xyzw, cb4[r1.w + 0].xyzw, v1.wwww, r2.xyzw
dp4 r2.y, v0.xyzw, r1.xyzw
mul r3.xyzw, v1.yyyy, cb4[r0.y + 0].xyzw
mad r3.xyzw, cb4[r0.x + 0].xyzw, v1.xxxx, r3.xyzw
mad r3.xyzw, cb4[r0.z + 0].xyzw, v1.zzzz, r3.xyzw
mad r3.xyzw, cb4[r0.w + 0].xyzw, v1.wwww, r3.xyzw
dp4 r2.x, v0.xyzw, r3.xyzw
iadd r4.xyzw, r0.xyzw, l(2, 2, 2, 2)
mul r5.xyzw, v1.yyyy, cb4[r4.y + 0].xyzw
mad r5.xyzw, cb4[r4.x + 0].xyzw, v1.xxxx, r5.xyzw
mad r5.xyzw, cb4[r4.z + 0].xyzw, v1.zzzz, r5.xyzw
mad r4.xyzw, cb4[r4.w + 0].xyzw, v1.wwww, r5.xyzw
dp4 r2.z, v0.xyzw, r4.xyzw
mov r2.w, l(1.000000)
dp4 r5.x, r2.xyzw, cb2[0].xyzw
dp4 r5.y, r2.xyzw, cb2[1].xyzw
dp4 r5.w, r2.xyzw, cb2[3].xyzw
mov r20.xyw, r5.xyxw
div r5.xy, r5.xyxx, r5.wwww
dp4 r20.z, r2.xyzw, cb2[2].xyzw
add r26.x, r20.w, -r25.y
mad r20.x, r25.x, r26.x, r20.x
mov o0.xyzw, r20.xyzw
mul o1.xy, v5.xyxx, cb0[2].wwww
dp3 r6.y, v4.xyzx, r1.xyzx
dp3 r1.y, v3.xyzx, r1.xyzx
dp3 r6.z, v4.xyzx, r4.xyzx
dp3 r1.z, v3.xyzx, r4.xyzx
dp3 r6.x, v4.xyzx, r3.xyzx
dp3 r1.x, v3.xyzx, r3.xyzx
dp3 r3.x, r6.xyzx, cb2[4].xyzx
dp3 r3.y, r6.xyzx, cb2[5].xyzx
dp3 r3.z, r6.xyzx, cb2[6].xyzx
dp3 r1.w, r3.xyzx, r3.xyzx
rsq r1.w, r1.w
mul r3.xyz, r1.wwww, r3.xyzx
mov o2.xyz, r3.xyzx
frc r4.xyzw, cb0[0].xyzw
add r4.xyzw, -r4.xyzw, cb0[0].xyzw
mad r6.xyzw, -r4.xxwy, l(0.00392156886, 0.00392156886, 0.00392156886, 0.00392156886), l(1.000000, 1.100000, 1.000000, 1.000000)
mov o2.w, r6.w
dp3 r7.x, r1.xyzx, cb2[4].xyzx
dp3 r7.y, r1.xyzx, cb2[5].xyzx
dp3 r7.z, r1.xyzx, cb2[6].xyzx
dp3 r1.x, r7.xyzx, r7.xyzx
rsq r1.x, r1.x
mul r1.xyz, r1.xxxx, r7.xyzx
mul r7.xyz, r3.yzxy, r1.zxyz
mad r3.xyz, r1.yzxy, r3.zxyz, -r7.xyzx
mov o5.xyz, r1.xyzx
mul o3.xyz, r3.xyzx, v4.wwww
mul o3.w, r4.z, l(0.00235294132)
mad r1.x, r4.w, l(0.00392156886), l(-0.250000)
add r1.x, r1.x, r1.x
dp4 o4.x, r2.xyzw, cb2[4].xyzw
dp4 o4.y, r2.xyzw, cb2[5].xyzw
dp4 o4.z, r2.xyzw, cb2[6].xyzw
mul r1.y, r6.z, l(4.000000)
min_sat r1.x, r1.y, r1.x
mad o6.zw, r1.xxxx, l(0.000000, 0.000000, 1.000000, -1.000000), l(0.000000, 0.000000, 0.000000, 1.000000)
mul o6.xy, v5.xyxx, cb0[1].wwww
max r1.x, r6.y, l(1.000000)
add r1.x, -r6.x, r1.x
div r1.x, l(1.000000, 1.000000, 1.000000, 1.000000), r1.x
mul o7.y, r1.x, -r6.x
mov o7.x, r1.x
iadd r1.xyzw, r0.xyzw, l(3, 3, 3, 3)
mul r2.xyzw, v1.yyyy, cb4[r1.y + 0].xyzw
mad r2.xyzw, cb4[r1.x + 0].xyzw, v1.xxxx, r2.xyzw
mad r2.xyzw, cb4[r1.z + 0].xyzw, v1.zzzz, r2.xyzw
mad r1.xyzw, cb4[r1.w + 0].xyzw, v1.wwww, r2.xyzw
dp4 r1.x, v0.xyzw, r1.xyzw
iadd r2.xyzw, r0.xyzw, l(4, 4, 4, 4)
iadd r0.xyzw, r0.xyzw, l(5, 5, 5, 5)
mul r3.xyzw, v1.yyyy, cb4[r2.y + 0].xyzw
mad r3.xyzw, cb4[r2.x + 0].xyzw, v1.xxxx, r3.xyzw
mad r3.xyzw, cb4[r2.z + 0].xyzw, v1.zzzz, r3.xyzw
mad r2.xyzw, cb4[r2.w + 0].xyzw, v1.wwww, r3.xyzw
dp4 r1.y, v0.xyzw, r2.xyzw
mul r2.xyzw, v1.yyyy, cb4[r0.y + 0].xyzw
mad r2.xyzw, cb4[r0.x + 0].xyzw, v1.xxxx, r2.xyzw
mad r2.xyzw, cb4[r0.z + 0].xyzw, v1.zzzz, r2.xyzw
mad r0.xyzw, cb4[r0.w + 0].xyzw, v1.wwww, r2.xyzw
dp4 r1.z, v0.xyzw, r0.xyzw
mov r1.w, l(1.000000)
dp4 r0.z, r1.xyzw, cb2[0].xyzw
dp4 r0.w, r1.xyzw, cb2[1].xyzw
dp4 r0.x, r1.xyzw, cb2[3].xyzw
div r0.xy, r0.zwzz, r0.xxxx
add r0.xy, -r0.xyxx, r5.xyxx
mul o7.zw, r0.xxxy, l(0.000000, 0.000000, 0.500000, -0.500000)
ret
// Approximately 0 instruction slots used
