// AUTOMATICALLY CONVERTED FROM SHADER FIXES 
//
// Generated by Microsoft (R) HLSL Shader Compiler 10.1
//
//   using 3Dmigoto v0.6.89 on Wed Dec 21 13:15:34 2022
//
//
// Buffer Definitions:
//
// cbuffer cb1
// {
//
//   float4 cb1[43];                    // Index:    0-42             Components:   172
//
// }
//
//
// Resource Bindings:
//
// Name                                 Type  Format         Dim Slot Elements
// ------------------------------ ---------- ------- ----------- ---- --------
// StereoParams                      texture  float4          2d  125        1
// cb1                               cbuffer      NA          NA    1        1
//
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// POSITION                 0   xyz         0     NONE   float   xy
// COLOR                    0   xyzw        1     NONE   float   xyzw
// TEXCOORD                 0   xyzw        2     NONE   float   xy
// TEXCOORD                 1   xyzw        3     NONE   float   xy
// TEXCOORD                 2   xy          4     NONE   float   xy
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// TEXCOORD                 0   xyzw        0     NONE   float   xy
// TEXCOORD                 1   xyzw        1     NONE   float   xyzw
// SV_Position              0   xyzw        2      POS   float   xyzw
// P                        0   x           3  RTINDEX    uint   x
//
vs_5_0
dcl_output_siv o3.x, rendertarget_array_index
dcl_globalFlags refactoringAllowed
dcl_constantbuffer CB1[43], immediateIndexed
dcl_resource_buffer (float,float,float,float) t125
dcl_input v0.xy
dcl_input v1.xyzw
dcl_input v2.xy
dcl_input v3.xy
dcl_input v4.xy
dcl_output o0.xy
dcl_output o1.xyzw
dcl_output_siv o2.xyzw, position
dcl_temps 4
ld_indexable(buffer)(float,float,float,float) r3.xyzw, l(0, 0, 0, 0), t125.xyzw
mov o3.x, r3.z
mov o0.xy, v4.xyxx
mov o1.xyzw, v1.xyzw
ld_indexable(buffer)(float,float,float,float) r0.x, l(0, 0, 0, 0), t125.xyzw
add r0.x, r0.x, v0.x
dp2 r0.z, v2.yxyy, v3.xyxx
mov r0.y, v0.y
mad r0.xy, r0.zzzz, l(1.000000, 0.000000, 0.000000, 0.000000), r0.xyxx
mul r0.z, v2.y, v3.y
mad r0.z, v3.x, v2.x, -r0.z
mad r1.xy, r0.zzzz, l(0.000000, 1.000000, 0.000000, 0.000000), r0.xyxx
add r1.z, -cb1[42].x, l(1.000000)
mov r1.w, l(1.000000)
add r2.x, -r3.y, r1.w
mul r2.y, r3.x, r3.w
mad r2.x, r2.x, r2.y, r1.x
ne r2.y, l(1.000000), r1.w
movc r1.x, r2.y, r2.x, r1.x
mov o2.xyzw, r1.xyzw
ret
// Approximately 13 instruction slots used
