// AUTOMATICALLY CONVERTED FROM SHADER FIXES 
//
// Generated by Microsoft (R) HLSL Shader Compiler 10.1
//
//   using 3Dmigoto v0.6.89 on Wed Dec 21 12:57:03 2022
//
//
// Buffer Definitions:
//
// cbuffer cb12
// {
//
//   float4 cb12[225];                  // Index:    0-224            Components:   900
//
// }
//
//
// Resource Bindings:
//
// Name                                 Type  Format         Dim Slot Elements
// ------------------------------ ---------- ------- ----------- ---- --------
// s0_s                              sampler      NA          NA    0        1
// s1_s                              sampler      NA          NA    1        1
// t0                                texture  float4          2d    0        1
// t1                                texture  float4          2d    1        1
// t15                               texture  float4          2d   15        1
// StereoParams                      texture  float4          2d  125        1
// cb12                              cbuffer      NA          NA   12        1
//
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Position              0   xyzw        0      POS   float   xy
// COLOR                    0   xyzw        1     NONE   float   xyzw
// TEXCOORD                 0   xyzw        2     NONE   float   xy
// TEXCOORD                 2   xyzw        3     NONE   float
// TEXCOORD                 3   xyzw        4     NONE   float   xy w
// EXTRA_DATA               0   xyzw        5     NONE   float   xyzw
// EXTRA_DATA               1   xyzw        6     NONE   float   xyzw
// EXTRA_DATA               2   xyzw        7     NONE   float   xyzw
// EXTRA_DATA               3   xyzw        8     NONE   float
// MORE_DATA                0   xyzw        9     NONE   float
// MORE_DATA                1   xyzw       10     NONE   float
// MORE_DATA                2   xyzw       11     NONE   float
// MORE_DATA                3   xyzw       12     NONE   float
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Target                0   xyzw        0   TARGET   float   xyzw
// SV_Target                1   xyzw        1   TARGET   float   xyzw
//
ps_5_0
dcl_globalFlags refactoringAllowed
dcl_constantbuffer CB12[221], immediateIndexed
dcl_sampler s0, mode_default
dcl_sampler s1, mode_default
dcl_resource_texture2d (float,float,float,float) t0
dcl_resource_texture2d (float,float,float,float) t1
dcl_resource_texture2d (float,float,float,float) t15
dcl_resource_buffer (float,float,float,float) t125
dcl_input_ps_siv linear noperspective v0.xy, position
dcl_input_ps linear v1.xyzw
dcl_input_ps linear v2.xy
dcl_input_ps linear v4.xyw
dcl_input_ps linear v5.xyzw
dcl_input_ps linear v6.xyzw
dcl_input_ps linear v7.xyzw
dcl_output o0.xyzw
dcl_output o1.xyzw
dcl_temps 3
ld_indexable(buffer)(float,float,float,float) r0.xy, l(0, 0, 0, 0), t125.xyzw
ftou r0.zw, v0.xxxy
utof r0.zw, r0.zzzw
ftoi r1.xy, r0.zwzz
mov r1.zw, l(0,0,0,0)
ld_indexable(texture2d)(float,float,float,float) r1.x, r1.xyzw, t15.xyzw
mul r2.xyzw, r0.wwww, cb12[212].wxyw
mad r0.w, cb12[211].w, r0.z, r2.x
mad r0.w, cb12[213].w, r1.x, r0.w
add r0.w, r0.w, cb12[214].w
mad r0.y, r0.y, r0.w, l(-1.000000)
mul r0.x, r0.y, r0.x
mad r0.x, r0.x, cb12[220].x, r0.z
mad r0.xyz, cb12[211].xywx, r0.xxxx, r2.yzwy
mad r0.xyz, cb12[213].xywx, r1.xxxx, r0.xyzx
add r0.xyz, r0.xyzx, cb12[214].xywx
div r0.xy, r0.xyxx, r0.zzzz
add r0.xy, r0.xyxx, -v4.xyxx
dp2 r0.x, r0.xyxx, r0.xyxx
sqrt r0.x, r0.x
lt r0.x, v4.w, r0.x
discard_nz r0.x
sample_aoffimmi_indexable(0,0,0)(texture2d)(float,float,float,float) r0.xyzw, v2.xyxx, t0.xyzw, s0
sample_aoffimmi_indexable(0,0,0)(texture2d)(float,float,float,float) r1.xyz, v2.xyxx, t1.xyzw, s1
mad r1.xyz, r1.xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), l(-1.000000, -1.000000, -1.000000, 0.000000)
mov r1.w, l(1.000000)
dp4 r2.x, r1.xyzw, v5.xyzw
dp4 r2.y, r1.xyzw, v6.xyzw
dp4 r2.z, r1.xyzw, v7.xyzw
mul r0.xyzw, r0.xyzw, v1.xyzw
add r1.xyz, r2.xyzx, l(1.000000, 1.000000, 1.000000, 0.000000)
mul o1.xyz, r1.xyzx, l(0.500000, 0.500000, 0.500000, 0.000000)
mov o0.xyzw, r0.xyzw
mov o1.w, r0.w
ret
// Approximately 35 instruction slots used
