// AUTOMATICALLY CONVERTED FROM SHADER FIXES 
//
// Generated by Microsoft (R) D3D Shader Disassembler
//
//   using 3Dmigoto v0.6.63 on Sun Oct  9 13:48:42 2022
//
//
// Note: shader requires additional functionality:
//       64 UAV slots
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Input
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Output
cs_5_0
dcl_globalFlags refactoringAllowed
dcl_constantbuffer CB0[1], immediateIndexed
dcl_resource_structured t0, 4
dcl_resource_buffer (uint,uint,uint,uint) t1
dcl_uav_structured u8, 4
dcl_uav_typed_buffer (uint,uint,uint,uint) u9
dcl_uav_typed_buffer (uint,uint,uint,uint) u10
dcl_input vThreadIDInGroupFlattened
dcl_input vThreadGroupID.xy
dcl_temps 5
dcl_indexableTemp x0[9], 4
dcl_tgsm_structured g0, 4, 64
dcl_tgsm_structured g1, 4, 64
dcl_thread_group 64, 1, 1
ushr r0.xy, vThreadIDInGroupFlattened.xxxx, l(2, 3, 0, 0)
and r0.xy, r0.xyxx, l(4, 4, 0, 0)
xor r0.y, r0.x, r0.y
ishl r0.z, vThreadIDInGroupFlattened.x, l(1)
ushr r0.zw, l(0, 0, 0xebfa5014, 0xfa4141af), r0.zzzz
bfi r1.xy, l(2, 2, 0, 0), l(0, 0, 0, 0), r0.zwzz, r0.yxyy
imad r0.xy, vThreadGroupID.xyxx, l(8, 8, 0, 0), r1.xyxx
ult r0.zw, r0.xxxy, cb0[0].yyyz
and r0.z, r0.w, r0.z
imad r0.x, r0.y, cb0[0].y, r0.x
ld_indexable(buffer)(uint,uint,uint,uint) r0.y, l(0, 0, 0, 0), t1.yxzw
mov x0[0].x, l(0)
ld_indexable(buffer)(uint,uint,uint,uint) r0.w, l(1, 1, 1, 1), t1.yzwx
mov x0[1].x, r0.y
iadd r1.x, r0.w, r0.y
ld_indexable(buffer)(uint,uint,uint,uint) r1.y, l(2, 2, 2, 2), t1.yxzw
mov x0[2].x, r1.x
iadd r1.z, r1.y, r1.x
ld_indexable(buffer)(uint,uint,uint,uint) r1.w, l(3, 3, 3, 3), t1.yzwx
mov x0[3].x, r1.z
iadd r2.x, r1.w, r1.z
ld_indexable(buffer)(uint,uint,uint,uint) r2.y, l(4, 4, 4, 4), t1.yxzw
mov x0[4].x, r2.x
iadd r2.z, r2.y, r2.x
ld_indexable(buffer)(uint,uint,uint,uint) r2.w, l(5, 5, 5, 5), t1.yzwx
mov x0[5].x, r2.z
iadd r3.x, r2.w, r2.z
ld_indexable(buffer)(uint,uint,uint,uint) r3.y, l(6, 6, 6, 6), t1.yxzw
mov x0[6].x, r3.x
iadd r3.z, r3.y, r3.x
ld_indexable(buffer)(uint,uint,uint,uint) r3.w, l(7, 7, 7, 7), t1.yzwx
mov x0[7].x, r3.z
iadd r4.x, r3.w, r3.z
store_structured g0.x, vThreadIDInGroupFlattened.x, l(0), l(0)
store_structured g1.x, vThreadIDInGroupFlattened.x, l(0), l(0)
sync_g_t
mov x0[8].x, r4.x
if_z r0.x
  iadd r4.y, -r4.x, cb0[0].x
  store_uav_typed u10.xyzw, l(0,0,0,0), r0.yyyy
  store_uav_typed u10.xyzw, l(1,1,1,1), l(1,1,1,1)
  store_uav_typed u10.xyzw, l(2,2,2,2), l(1,1,1,1)
  store_uav_typed u10.xyzw, l(3,3,3,3), l(0,0,0,0)
  store_uav_typed u10.xyzw, l(8,8,8,8), r0.wwww
  store_uav_typed u10.xyzw, l(9,9,9,9), l(1,1,1,1)
  store_uav_typed u10.xyzw, l(10,10,10,10), l(1,1,1,1)
  store_uav_typed u10.xyzw, l(11,11,11,11), r0.yyyy
  store_uav_typed u10.xyzw, l(16,16,16,16), r1.yyyy
  store_uav_typed u10.xyzw, l(17,17,17,17), l(1,1,1,1)
  store_uav_typed u10.xyzw, l(18,18,18,18), l(1,1,1,1)
  store_uav_typed u10.xyzw, l(19,19,19,19), r1.xxxx
  store_uav_typed u10.xyzw, l(24,24,24,24), r1.wwww
  store_uav_typed u10.xyzw, l(25,25,25,25), l(1,1,1,1)
  store_uav_typed u10.xyzw, l(26,26,26,26), l(1,1,1,1)
  store_uav_typed u10.xyzw, l(27,27,27,27), r1.zzzz
  store_uav_typed u10.xyzw, l(32,32,32,32), r2.yyyy
  store_uav_typed u10.xyzw, l(33,33,33,33), l(1,1,1,1)
  store_uav_typed u10.xyzw, l(34,34,34,34), l(1,1,1,1)
  store_uav_typed u10.xyzw, l(35,35,35,35), r2.xxxx
  store_uav_typed u10.xyzw, l(40,40,40,40), r2.wwww
  store_uav_typed u10.xyzw, l(41,41,41,41), l(1,1,1,1)
  store_uav_typed u10.xyzw, l(42,42,42,42), l(1,1,1,1)
  store_uav_typed u10.xyzw, l(43,43,43,43), r2.zzzz
  store_uav_typed u10.xyzw, l(48,48,48,48), r3.yyyy
  store_uav_typed u10.xyzw, l(49,49,49,49), l(1,1,1,1)
  store_uav_typed u10.xyzw, l(50,50,50,50), l(1,1,1,1)
  store_uav_typed u10.xyzw, l(51,51,51,51), r3.xxxx
  store_uav_typed u10.xyzw, l(56,56,56,56), r3.wwww
  store_uav_typed u10.xyzw, l(57,57,57,57), l(1,1,1,1)
  store_uav_typed u10.xyzw, l(58,58,58,58), l(1,1,1,1)
  store_uav_typed u10.xyzw, l(59,59,59,59), r3.zzzz
  store_uav_typed u10.xyzw, l(64,64,64,64), r4.yyyy
  store_uav_typed u10.xyzw, l(65,65,65,65), l(1,1,1,1)
  store_uav_typed u10.xyzw, l(66,66,66,66), l(1,1,1,1)
  store_uav_typed u10.xyzw, l(67,67,67,67), r4.xxxx
endif
ishl r0.y, r0.x, l(2)
ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r0.y, r0.y, l(0), t0.xxxx
and r1.xyzw, r0.yyyy, l(0x00100000, 0x00200000, 0x00400000, 0x00800000)
movc r2.xyz, r1.yzwy, l(1,2,4,0), l(0,0,0,0)
iadd r0.w, r2.y, r2.x
iadd r0.w, r2.z, r0.w
movc r2.x, r1.x, l(8), r0.w
if_nz r0.z
  mov r2.y, l(0)
  imm_atomic_iadd r3.x, g0, r2.xyxx, l(1)
else
  mov r3.x, l(0)
endif
sync_g_t
ult r0.w, vThreadIDInGroupFlattened.x, l(9)
ld_structured r2.y, vThreadIDInGroupFlattened.x, l(0), g0.xxxx
ult r2.z, l(0), r2.y
and r0.w, r0.w, r2.z
if_nz r0.w
  imm_atomic_iadd r4.x, u9, vThreadIDInGroupFlattened.x, r2.y
  store_structured g1.x, vThreadIDInGroupFlattened.x, l(0), r4.x
endif
sync_g_t
if_nz r0.z
  bfi r0.xzw, l(30, 0, 30, 30), l(2, 0, 2, 2), r0.xxxx, l(1, 0, 2, 3)
  ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r0.x, r0.x, l(0), t0.xxxx
  ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r0.z, r0.z, l(0), t0.xxxx
  ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r0.w, r0.w, l(0), t0.xxxx
  and r2.yz, r0.yyyy, l(0, 0x01000000, 0x02000000, 0)
  mov r2.w, x0[r2.x + 0].x
  ld_structured r2.x, r2.x, l(0), g1.xxxx
  iadd r2.x, r2.x, r2.w
  iadd r2.x, r3.x, r2.x
  ishl r2.w, r2.x, l(2)
  movc r1.xyzw, r1.xyzw, l(0x00100000,0x00200000,0x00400000,1.175494351E-38), l(0,0,0,0)
  bfi r0.y, l(20), l(0), r0.y, r1.x
  iadd r0.y, r1.y, r0.y
  iadd r0.y, r1.z, r0.y
  iadd r0.y, r1.w, r0.y
  movc r1.xy, r2.yzyy, l(2.350988702E-38,9.403954807E-38,0,0), l(0,0,0,0)
  iadd r0.y, r0.y, r1.x
  iadd r0.y, r1.y, r0.y
  and r0.xw, r0.xxxw, l(0x0fffffff, 0, 0, 0x0001ffff)
  store_structured u8.x, r2.w, l(0), r0.y
  bfi r1.xyz, l(30, 30, 30, 0), l(2, 2, 2, 0), r2.xxxx, l(1, 2, 3, 0)
  store_structured u8.x, r1.x, l(0), r0.x
  store_structured u8.x, r1.y, l(0), r0.z
  store_structured u8.x, r1.z, l(0), r0.w
endif
ret
// Approximately 0 instruction slots used
