// AUTOMATICALLY CONVERTED FROM SHADER FIXES 
//
// Generated by Microsoft (R) D3D Shader Disassembler
//
//   using 3Dmigoto v0.6.63 on Sun Oct  9 13:48:43 2022
//
//
// Note: shader requires additional functionality:
//       64 UAV slots
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Input
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Output
cs_5_0
dcl_constantbuffer CB12[3], immediateIndexed
dcl_globalFlags refactoringAllowed
dcl_resource_texture2d (float,float,float,float) t3
dcl_uav_typed_texture2darray (float,float,float,float) u8
dcl_input vThreadIDInGroupFlattened
dcl_input vThreadGroupID.xy
dcl_temps 50
dcl_tgsm_structured g0, 4, 88
dcl_tgsm_structured g1, 8, 88
dcl_thread_group 64, 1, 1
dcl_resource_texture1d (float,float,float,float) t120
mov r50.z, l(0)
ld_indexable(texture1d)(float,float,float,float) r30.xyzw, l(10, 0, 0, 0), t120.xyzw
ishl r0.xyzw, vThreadGroupID.xyyy, l(0, 6, 6, 6)
ieq r31.x, r30.w, l(0x3f800000)
if_nz r31.x
  ret
endif
mov r1.x, l(0)
mov r1.yzw, vThreadIDInGroupFlattened.xxxx
iadd r0.xyzw, r0.xyzw, r1.xyzw
iadd r1.xy, r0.xwxx, l(0, -12, 0, 0)
mov r1.zw, l(0,0,0,0)
ld_indexable(texture2d)(float,float,float,float) r1.xyzw, r1.xyzw, t3.xyzw
store_structured g1.xy, vThreadIDInGroupFlattened.x, l(0), r1.xyxx
f32tof16 r1.xy, r1.zwzz
imad r1.x, r1.y, l(0x00010000), r1.x
store_structured g0.x, vThreadIDInGroupFlattened.x, l(0), r1.x
uge r1.x, vThreadIDInGroupFlattened.x, l(40)
if_nz r1.x
  iadd r1.xy, r0.xwxx, l(0, 12, 0, 0)
  iadd r2.x, vThreadIDInGroupFlattened.x, l(24)
  mov r1.zw, l(0,0,0,0)
  ld_indexable(texture2d)(float,float,float,float) r1.xyzw, r1.xyzw, t3.xyzw
  store_structured g1.xy, r2.x, l(0), r1.xyxx
  f32tof16 r1.xy, r1.zwzz
  imad r1.x, r1.y, l(0x00010000), r1.x
  store_structured g0.x, r2.x, l(0), r1.x
endif
sync_g_t
iadd r1.xyzw, vThreadIDInGroupFlattened.xxxx, l(12, 1, 3, 4)
ld_structured r2.x, r1.x, l(0), g0.xxxx
and r2.yzw, r2.xxxx, l(0, 0x00008000, 0xffff7fff, 0x00007fff)
ine r2.y, r2.y, l(0)
f16tof32 r2.w, r2.w
ld_structured r3.xy, r1.x, l(0), g1.xyxx
ld_structured r1.x, vThreadIDInGroupFlattened.x, l(0), g0.xxxx
and r4.xyz, r1.xxxx, l(0x00008000, 0xffff7fff, 0x00007fff, 0)
ine r1.x, r4.x, l(0)
uge r3.z, r2.z, r4.y
f16tof32 r3.w, r4.z
mul r3.w, r3.w, l(0.00315111014)
max r3.w, r2.w, r3.w
movc r2.w, r3.z, r3.w, r2.w
ld_structured r3.zw, vThreadIDInGroupFlattened.x, l(0), g1.xxxy
max r4.xyzw, r3.yyyy, l(-12.000000, -11.000000, -9.000000, -8.000000)
min r4.xyzw, r4.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000)
eq r4.xyzw, r4.xyzw, l(-12.000000, -11.000000, -9.000000, -8.000000)
not r5.x, r2.y
and r5.y, r1.x, r5.x
mul r5.z, |r3.y|, l(0.750000)
lt r5.w, |r3.w|, r5.z
and r4.x, r4.x, r5.w
movc r4.x, r4.x, l(2.000000), l(0.0529304929)
movc r4.x, r5.y, r4.x, l(0.0529304929)
not r1.x, r1.x
and r1.x, r1.x, r2.y
mul r5.y, |r3.w|, l(0.750000)
lt r5.y, |r3.y|, r5.y
movc r5.y, r5.y, l(0), r4.x
movc r1.x, r1.x, r5.y, r4.x
mad r3.xz, r1.xxxx, r3.zzwz, r3.xxyx
add r1.x, r1.x, l(1.000000)
ld_structured r3.w, r1.y, l(0), g0.xxxx
and r6.xyz, r3.wwww, l(0x00008000, 0xffff7fff, 0x00007fff, 0)
ine r3.w, r6.x, l(0)
uge r4.x, r2.z, r6.y
f16tof32 r5.y, r6.z
mul r5.y, r5.y, l(0.00790705346)
max r5.y, r2.w, r5.y
movc r2.w, r4.x, r5.y, r2.w
ld_structured r5.yw, r1.y, l(0), g1.xxxy
and r1.y, r3.w, r5.x
lt r4.x, |r5.w|, r5.z
and r4.x, r4.x, r4.y
movc r4.x, r4.x, l(2.000000), l(0.0846366659)
movc r1.y, r1.y, r4.x, l(0.0846366659)
not r3.w, r3.w
and r3.w, r2.y, r3.w
mul r4.x, |r5.w|, l(0.750000)
lt r4.x, |r3.y|, r4.x
movc r4.x, r4.x, l(0), r1.y
movc r1.y, r3.w, r4.x, r1.y
mad r3.xz, r1.yyyy, r5.yywy, r3.xxzx
add r1.x, r1.y, r1.x
ld_structured r1.y, r1.z, l(0), g0.xxxx
and r6.xyz, r1.yyyy, l(0x00008000, 0xffff7fff, 0x00007fff, 0)
ine r1.y, r6.x, l(0)
uge r3.w, r2.z, r6.y
f16tof32 r4.x, r6.z
mul r4.x, r4.x, l(0.0391638912)
max r4.x, r2.w, r4.x
movc r2.w, r3.w, r4.x, r2.w
ld_structured r4.xy, r1.z, l(0), g1.xyxx
and r1.z, r1.y, r5.x
lt r3.w, |r4.y|, r5.z
and r3.w, r3.w, r4.z
movc r3.w, r3.w, l(2.000000), l(0.191462874)
movc r1.z, r1.z, r3.w, l(0.191462874)
not r1.y, r1.y
and r1.y, r1.y, r2.y
mul r3.w, |r4.y|, l(0.750000)
lt r3.w, |r3.y|, r3.w
movc r3.w, r3.w, l(0), r1.z
movc r1.y, r1.y, r3.w, r1.z
mad r3.xz, r1.yyyy, r4.xxyx, r3.xxzx
add r1.x, r1.y, r1.x
ld_structured r1.y, r1.w, l(0), g0.xxxx
and r4.xyz, r1.yyyy, l(0x00008000, 0xffff7fff, 0x00007fff, 0)
ine r1.y, r4.x, l(0)
uge r1.z, r2.z, r4.y
f16tof32 r3.w, r4.z
mul r3.w, r3.w, l(0.0773047432)
max r3.w, r2.w, r3.w
movc r1.z, r1.z, r3.w, r2.w
ld_structured r4.xy, r1.w, l(0), g1.xyxx
and r1.w, r1.y, r5.x
lt r2.w, |r4.y|, r5.z
and r2.w, r2.w, r4.w
movc r2.w, r2.w, l(2.000000), l(0.270868331)
movc r1.w, r1.w, r2.w, l(0.270868331)
not r1.y, r1.y
and r1.y, r1.y, r2.y
mul r2.w, |r4.y|, l(0.750000)
lt r2.w, |r3.y|, r2.w
movc r2.w, r2.w, l(0), r1.w
movc r1.y, r1.y, r2.w, r1.w
mad r3.xz, r1.yyyy, r4.xxyx, r3.xxzx
add r1.x, r1.y, r1.x
iadd r4.xyzw, vThreadIDInGroupFlattened.xxxx, l(6, 7, 9, 10)
ld_structured r1.y, r4.x, l(0), g0.xxxx
and r6.xyz, r1.yyyy, l(0x00008000, 0xffff7fff, 0x00007fff, 0)
ine r1.y, r6.x, l(0)
uge r1.w, r2.z, r6.y
f16tof32 r2.w, r6.z
mul r2.w, r2.w, l(0.236927733)
max r2.w, r1.z, r2.w
movc r1.z, r1.w, r2.w, r1.z
ld_structured r5.yw, r4.x, l(0), g1.xxxy
max r6.xyzw, r3.yyyy, l(-6.000000, -5.000000, -3.000000, -2.000000)
min r6.xyzw, r6.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000)
eq r6.xyzw, r6.xyzw, l(-6.000000, -5.000000, -3.000000, -2.000000)
and r1.w, r1.y, r5.x
lt r2.w, |r5.w|, r5.z
and r2.w, r2.w, r6.x
movc r2.w, r2.w, l(2.000000), l(0.479652256)
movc r1.w, r1.w, r2.w, l(0.479652256)
not r1.y, r1.y
and r1.y, r1.y, r2.y
mul r2.w, |r5.w|, l(0.750000)
lt r2.w, |r3.y|, r2.w
movc r2.w, r2.w, l(0), r1.w
movc r1.y, r1.y, r2.w, r1.w
mad r3.xz, r1.yyyy, r5.yywy, r3.xxzx
add r1.x, r1.y, r1.x
ld_structured r1.y, r4.y, l(0), g0.xxxx
and r7.xyz, r1.yyyy, l(0x00008000, 0xffff7fff, 0x00007fff, 0)
ine r1.y, r7.x, l(0)
uge r1.w, r2.z, r7.y
f16tof32 r2.w, r7.z
mul r2.w, r2.w, l(0.367879450)
max r2.w, r1.z, r2.w
movc r1.z, r1.w, r2.w, r1.z
ld_structured r4.xy, r4.y, l(0), g1.xyxx
and r1.w, r1.y, r5.x
lt r2.w, |r4.y|, r5.z
and r2.w, r2.w, r6.y
movc r2.w, r2.w, l(2.000000), l(0.600373)
movc r1.w, r1.w, r2.w, l(0.600373)
not r1.y, r1.y
and r1.y, r1.y, r2.y
mul r2.w, |r4.y|, l(0.750000)
lt r2.w, |r3.y|, r2.w
movc r2.w, r2.w, l(0), r1.w
movc r1.y, r1.y, r2.w, r1.w
mad r3.xz, r1.yyyy, r4.xxyx, r3.xxzx
add r1.x, r1.y, r1.x
ld_structured r1.y, r4.z, l(0), g0.xxxx
and r7.xyz, r1.yyyy, l(0x00008000, 0xffff7fff, 0x00007fff, 0)
ine r1.y, r7.x, l(0)
uge r1.w, r2.z, r7.y
f16tof32 r2.w, r7.z
mul r2.w, r2.w, l(0.697676301)
max r2.w, r1.z, r2.w
movc r1.z, r1.w, r2.w, r1.z
ld_structured r4.xy, r4.z, l(0), g1.xyxx
and r1.w, r1.y, r5.x
lt r2.w, |r4.y|, r5.z
and r2.w, r2.w, r6.z
movc r2.w, r2.w, l(2.000000), l(0.832207501)
movc r1.w, r1.w, r2.w, l(0.832207501)
not r1.y, r1.y
and r1.y, r1.y, r2.y
mul r2.w, |r4.y|, l(0.750000)
lt r2.w, |r3.y|, r2.w
movc r2.w, r2.w, l(0), r1.w
movc r1.y, r1.y, r2.w, r1.w
mad r3.xz, r1.yyyy, r4.xxyx, r3.xxzx
add r1.x, r1.y, r1.x
ld_structured r1.y, r4.w, l(0), g0.xxxx
and r4.xyz, r1.yyyy, l(0x00008000, 0xffff7fff, 0x00007fff, 0)
ine r1.y, r4.x, l(0)
uge r1.w, r2.z, r4.y
f16tof32 r2.w, r4.z
mul r2.w, r2.w, l(0.852143764)
max r2.w, r1.z, r2.w
movc r1.z, r1.w, r2.w, r1.z
ld_structured r4.xy, r4.w, l(0), g1.xyxx
and r1.w, r1.y, r5.x
lt r2.w, |r4.y|, r5.z
and r2.w, r2.w, r6.w
movc r2.w, r2.w, l(2.000000), l(0.921610475)
movc r1.w, r1.w, r2.w, l(0.921610475)
not r1.y, r1.y
and r1.y, r1.y, r2.y
mul r2.w, |r4.y|, l(0.750000)
lt r2.w, |r3.y|, r2.w
movc r2.w, r2.w, l(0), r1.w
movc r1.y, r1.y, r2.w, r1.w
mad r3.xz, r1.yyyy, r4.xxyx, r3.xxzx
add r1.x, r1.y, r1.x
iadd r4.xyzw, vThreadIDInGroupFlattened.xxxx, l(13, 15, 16, 18)
ld_structured r1.y, r4.x, l(0), g0.xxxx
and r6.xyz, r1.yyyy, l(0x00008000, 0xffff7fff, 0x00007fff, 0)
ine r1.y, r6.x, l(0)
uge r1.w, r2.z, r6.y
f16tof32 r2.w, r6.z
mul r2.w, r2.w, l(0.960789442)
max r2.w, r1.z, r2.w
movc r1.z, r1.w, r2.w, r1.z
ld_structured r5.yw, r4.x, l(0), g1.xxxy
mov_sat r1.w, r3.y
eq r1.w, r1.w, l(1.000000)
and r2.w, r1.y, r5.x
lt r3.w, |r5.w|, r5.z
and r1.w, r1.w, r3.w
movc r1.w, r1.w, l(2.000000), l(0.979798675)
movc r1.w, r2.w, r1.w, l(0.979798675)
not r1.y, r1.y
and r1.y, r1.y, r2.y
mul r2.w, |r5.w|, l(0.750000)
lt r2.w, |r3.y|, r2.w
movc r2.w, r2.w, l(0), r1.w
movc r1.y, r1.y, r2.w, r1.w
mad r3.xz, r1.yyyy, r5.yywy, r3.xxzx
add r1.x, r1.y, r1.x
ld_structured r1.y, r4.y, l(0), g0.xxxx
and r6.xyz, r1.yyyy, l(0x00008000, 0xffff7fff, 0x00007fff, 0)
ine r1.y, r6.x, l(0)
uge r1.w, r2.z, r6.y
f16tof32 r2.w, r6.z
mul r2.w, r2.w, l(0.697676301)
max r2.w, r1.z, r2.w
movc r1.z, r1.w, r2.w, r1.z
ld_structured r4.xy, r4.y, l(0), g1.xyxx
min r6.xyzw, r3.yyyy, l(3.000000, 4.000000, 6.000000, 7.000000)
max r6.xyzw, r6.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000)
eq r6.xyzw, r6.xyzw, l(3.000000, 4.000000, 6.000000, 7.000000)
and r1.w, r1.y, r5.x
lt r2.w, |r4.y|, r5.z
and r2.w, r2.w, r6.x
movc r2.w, r2.w, l(2.000000), l(0.832207501)
movc r1.w, r1.w, r2.w, l(0.832207501)
not r1.y, r1.y
and r1.y, r1.y, r2.y
mul r2.w, |r4.y|, l(0.750000)
lt r2.w, |r3.y|, r2.w
movc r2.w, r2.w, l(0), r1.w
movc r1.y, r1.y, r2.w, r1.w
mad r3.xz, r1.yyyy, r4.xxyx, r3.xxzx
add r1.x, r1.y, r1.x
ld_structured r1.y, r4.z, l(0), g0.xxxx
and r7.xyz, r1.yyyy, l(0x00008000, 0xffff7fff, 0x00007fff, 0)
ine r1.y, r7.x, l(0)
uge r1.w, r2.z, r7.y
f16tof32 r2.w, r7.z
mul r2.w, r2.w, l(0.527292430)
max r2.w, r1.z, r2.w
movc r1.z, r1.w, r2.w, r1.z
ld_structured r4.xy, r4.z, l(0), g1.xyxx
and r1.w, r1.y, r5.x
lt r2.w, |r4.y|, r5.z
and r2.w, r2.w, r6.y
movc r2.w, r2.w, l(2.000000), l(0.721422315)
movc r1.w, r1.w, r2.w, l(0.721422315)
not r1.y, r1.y
and r1.y, r1.y, r2.y
mul r2.w, |r4.y|, l(0.750000)
lt r2.w, |r3.y|, r2.w
movc r2.w, r2.w, l(0), r1.w
movc r1.y, r1.y, r2.w, r1.w
mad r3.xz, r1.yyyy, r4.xxyx, r3.xxzx
add r1.x, r1.y, r1.x
ld_structured r1.y, r4.w, l(0), g0.xxxx
and r4.xyz, r1.yyyy, l(0x00008000, 0xffff7fff, 0x00007fff, 0)
ine r1.y, r4.x, l(0)
uge r1.w, r2.z, r4.y
f16tof32 r2.w, r4.z
mul r2.w, r2.w, l(0.236927733)
max r2.w, r1.z, r2.w
movc r1.z, r1.w, r2.w, r1.z
ld_structured r4.xy, r4.w, l(0), g1.xyxx
and r1.w, r1.y, r5.x
lt r2.w, |r4.y|, r5.z
and r2.w, r2.w, r6.z
movc r2.w, r2.w, l(2.000000), l(0.479652256)
movc r1.w, r1.w, r2.w, l(0.479652256)
not r1.y, r1.y
and r1.y, r1.y, r2.y
mul r2.w, |r4.y|, l(0.750000)
lt r2.w, |r3.y|, r2.w
movc r2.w, r2.w, l(0), r1.w
movc r1.y, r1.y, r2.w, r1.w
mad r3.xz, r1.yyyy, r4.xxyx, r3.xxzx
add r1.x, r1.y, r1.x
iadd r4.xyzw, vThreadIDInGroupFlattened.xxxx, l(19, 21, 22, 24)
ld_structured r1.y, r4.x, l(0), g0.xxxx
and r6.xyz, r1.yyyy, l(0x00008000, 0xffff7fff, 0x00007fff, 0)
ine r1.y, r6.x, l(0)
uge r1.w, r2.z, r6.y
f16tof32 r2.w, r6.z
mul r2.w, r2.w, l(0.140858427)
max r2.w, r1.z, r2.w
movc r1.z, r1.w, r2.w, r1.z
ld_structured r5.yw, r4.x, l(0), g1.xxxy
and r1.w, r1.y, r5.x
lt r2.w, |r5.w|, r5.z
and r2.w, r2.w, r6.w
movc r2.w, r2.w, l(2.000000), l(0.367879450)
movc r1.w, r1.w, r2.w, l(0.367879450)
not r1.y, r1.y
and r1.y, r1.y, r2.y
mul r2.w, |r5.w|, l(0.750000)
lt r2.w, |r3.y|, r2.w
movc r2.w, r2.w, l(0), r1.w
movc r1.y, r1.y, r2.w, r1.w
mad r3.xz, r1.yyyy, r5.yywy, r3.xxzx
add r1.x, r1.y, r1.x
ld_structured r1.y, r4.y, l(0), g0.xxxx
and r6.xyz, r1.yyyy, l(0x00008000, 0xffff7fff, 0x00007fff, 0)
ine r1.y, r6.x, l(0)
uge r1.w, r2.z, r6.y
f16tof32 r2.w, r6.z
mul r2.w, r2.w, l(0.0391638912)
max r2.w, r1.z, r2.w
movc r1.z, r1.w, r2.w, r1.z
ld_structured r4.xy, r4.y, l(0), g1.xyxx
min r6.xyz, r3.yyyy, l(9.000000, 10.000000, 12.000000, 0.000000)
max r6.xyz, r6.xyzx, l(0.000000, 0.000000, 0.000000, 0.000000)
eq r6.xyz, r6.xyzx, l(9.000000, 10.000000, 12.000000, 0.000000)
and r1.w, r1.y, r5.x
lt r2.w, |r4.y|, r5.z
and r2.w, r2.w, r6.x
movc r2.w, r2.w, l(2.000000), l(0.191462874)
movc r1.w, r1.w, r2.w, l(0.191462874)
not r1.y, r1.y
and r1.y, r1.y, r2.y
mul r2.w, |r4.y|, l(0.750000)
lt r2.w, |r3.y|, r2.w
movc r2.w, r2.w, l(0), r1.w
movc r1.y, r1.y, r2.w, r1.w
mad r3.xz, r1.yyyy, r4.xxyx, r3.xxzx
add r1.x, r1.y, r1.x
ld_structured r1.y, r4.z, l(0), g0.xxxx
and r7.xyz, r1.yyyy, l(0x00008000, 0xffff7fff, 0x00007fff, 0)
ine r1.y, r7.x, l(0)
uge r1.w, r2.z, r7.y
f16tof32 r2.w, r7.z
mul r2.w, r2.w, l(0.0183156393)
max r2.w, r1.z, r2.w
movc r1.z, r1.w, r2.w, r1.z
ld_structured r4.xy, r4.z, l(0), g1.xyxx
and r1.w, r1.y, r5.x
lt r2.w, |r4.y|, r5.z
and r2.w, r2.w, r6.y
movc r2.w, r2.w, l(2.000000), l(0.129922614)
movc r1.w, r1.w, r2.w, l(0.129922614)
not r1.y, r1.y
and r1.y, r1.y, r2.y
mul r2.w, |r4.y|, l(0.750000)
lt r2.w, |r3.y|, r2.w
movc r2.w, r2.w, l(0), r1.w
movc r1.y, r1.y, r2.w, r1.w
mad r3.xz, r1.yyyy, r4.xxyx, r3.xxzx
add r1.x, r1.y, r1.x
ld_structured r1.y, r4.w, l(0), g0.xxxx
and r4.xyz, r1.yyyy, l(0x00008000, 0xffff7fff, 0x00007fff, 0)
ine r1.y, r4.x, l(0)
uge r1.w, r2.z, r4.y
f16tof32 r2.z, r4.z
mul r2.z, r2.z, l(0.00315111014)
max r2.z, r1.z, r2.z
movc r7.z, r1.w, r2.z, r1.z
ld_structured r1.zw, r4.w, l(0), g1.xxxy
and r2.z, r1.y, r5.x
lt r2.w, |r1.w|, r5.z
and r2.w, r2.w, r6.z
movc r2.w, r2.w, l(2.000000), l(0.0529304929)
movc r2.z, r2.z, r2.w, l(0.0529304929)
not r1.y, r1.y
and r1.y, r1.y, r2.y
mul r2.y, |r1.w|, l(0.750000)
lt r2.y, |r3.y|, r2.y
movc r2.y, r2.y, l(0), r2.z
movc r1.y, r1.y, r2.y, r2.z
mad r1.zw, r1.yyyy, r1.zzzw, r3.xxxz
add r1.x, r1.y, r1.x
div r1.xy, r1.zwzz, r1.xxxx
lt r1.zw, l(0.000000, 0.000000, 0.000000, 0.000000), r1.xxxy
lt r2.yz, r1.xxyx, l(0.000000, 0.000000, 0.000000, 0.000000)
iadd r1.zw, -r1.zzzw, r2.yyyz
itof r1.zw, r1.zzzw
add r2.y, r7.z, l(-1.000000)
max r2.y, r2.y, l(0.000000)
add r1.xy, |r1.xyxx|, -r2.yyyy
max r1.xy, r1.xyxx, l(0.000000, 0.000000, 0.000000, 0.000000)
mul r7.xy, r1.xyxx, r1.zwzz
ushr r1.x, r2.x, l(16)
f16tof32 r7.w, r1.x
mov r50.xy, r0.xyzw
store_uav_typed u8.xyzw, r50.xyzz, r7.xyzw
ret
// Approximately 0 instruction slots used
